Session Poster 3 - Mercredi 12 juin - 10h15 - 11h15 - Jardin Amphi Riquet
Vertical Nanowire Transistors: From Logic Gates to to Synthesized Logic Circuits
Sara Mannaa, Ian O'Connor
Multiplier-Less In-Memory Computing Artificial Neural Network for Embedded and Biomedical Applications in 28nm CMOS FDSOI
Antoine GAUTIER, Antoine FRAPPE, Benoit Larras
RISC-V acceleration through instruction extension for AI Application
Omar HAMMAMI
Proposition de jumeau numérique embarqué pour des aides technologiques adaptatives
Aurélian Houé, Florent De Lamotte, Cédric Seguin, Nathalie Julien, Willy ALLEGRE
Non-destructive methodology for BVCEO and BVCBO extraction of a 55nm SiGe Heterojunction Bipolar Transistor
Lucas Réveil, Florian Cacho, Magali De Matos, Chhandak Mukherjee, Cristell MANEUX
On the Design of Dispersive Filters for Analog Signal Processing
Hanane Meliani, Emilie Avignon-Meseldzija, Pietro Maris Ferreira
Récupérateur d'énergie RF à grande dynamique de puissance
Jesús ARGOTE AGUILAR, Muh-Dey WEI, Florin Doru Hutu, Guillaume Villemaud, Matthieu GAUTIER, Olivier BERDER, Renato NEGRA
Polarization Shift Keying: A new approach to secure IoT communications
Lamoussa SANOGO, Eric ALATA, Alexandru TAKACS, Gaël Loubet, Daniela Dragomirescu
Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM Memory
Dorian RONGA, Xhesila XHAFA, Patrick Girard, Thibault Vayssade, Arnaud Virazel
Randomness Generation in PQC and New Implementation Strategies Based on Approximate Computing
Diamante Simone Crescenzo, Emanuele Valea, Alberto Bosio
Models for the Underestimated Carbon Impact of CMOS Image Sensors
Weppe Olivier
Outil pour la conception de systèmes NIRS dans les tissus biologiques
Wenzheng Wang, Songlin Li, Ibrahim Saliba, Julien Denoulet, Sylvain Feruglio
Neural Network Compression by Resolution Scaling
Jérémy Morlier, Mathieu Léonardon, Vincent Gripon
Noise and Quantization Parameterization of Photonic Convolution Accelerator
Mateus VIDALETTI, Mauricio Gomes de Queiroz, Raphael Cardoso, Ian O'Connor, Arnan Mitchell
PEFSL: FPGAs for Embedded Few-Shot Learning
Lucas Grativol Ribeiro, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
Revisiting ENet for more efficient real-time embedded semantic segmentation on FPGA
Hugo LE BLEVEC, Mathieu Léonardon, Matthieu Arzel
SoC-FPGA based compact NQR Spectrometer
Noreddine Kachkachi, Axel Gansmüller, Hassan Rabah
Unsupervised learning of XOR and MNIST problems using STDP with neuromorphic circuits
Yannaël Bossard, Zalfa Jouni, Pietro Ferreira
