Programme > Programme détailé

Lundi 10 juin 2024

Heures événement (+)
12:30 - 13:00 Accueil des participants - Accueil des participants  
13:00 - 13:15 Ouverture du Colloque GdR SOC2 2024 - Ouverture du Colloque GdR SOC2 2024  
13:15 - 14:30

Calcul embarqué haute performance (INSA Toulouse - Amphi Riquet)

Matthieu Martel (Université de Perpignan) : Matrix Computations: In Seek of Frugality

Abstract: Frugal computing is becoming an important topic for environmental reasons. In this context, several techniques have been proposed to reduce the storage of scientific data by dedicated compression methods specially tailored for arrays of floating-point numbers. While these techniques are quite efficient to save memory, they introduce additional computations to com- press and decompress data before processing them. In this article, we introduce a new lossy, fixed-rate compression technique for 2D-arrays of floating-point numbers which allows one to compute directly on the compressed data, without decompressing them. We obtain important speedups since less operations are needed to compute among the compressed data and since no decompression and re-compression is needed. More precisely, our technique makes it possible to perform basic linear algebra operations such as addition, multiplication by a constant among compressed matrices and dot product and matrix multiplication among partly uncompressed matrices. This work has been implemented into a tool named blaz and we present a comparison with the well- known compressor zfp in terms of execution-time and accuracy.

 
14:30 - 15:30 Session Poster 1 et Pause café (INSA Toulouse - Hall Amphi Riquet)  
15:30 - 16:45 Intelligence artificielle et systèmes embarqués (INSA Toulouse - Amphi Riquet)  
17:00 - 18:15

Méthodologies et outils (INSA Toulouse - Amphi Riquet)

David Novo (CR LIRMM):    Smart Data Movement across the Memory Hierarchy of Modern Computing Systems

Abstract: Data storage and movement is a fundamental bottleneck in modern computing systems, greatly limiting their overall performance and energy efficiency. This presentation introduces two new techniques to achieve smarter data movement across the memory hierarchy. The first technique uses perceptron-based prediction to identify off-chip load requests using multiple program features. When the load is predicted to go off-chip, it issues a speculative request directly to the memory controller. As a result, the on-chip cache access latency is removed from the critical path when the prediction is correct. The second technique uses reinforcement learning for data placement in hybrid storage systems. These systems use multiple different storage devices to provide high and scalable storage capacity at high performance. Our new data placement technique observes different features of the running workload and the storage devices to make system-aware data placement decisions. Both techniques leverage machine learning algorithms to optimize data movement, significantly outperforming state-of-the-art solutions.

Claire Pagetti, (DR ONERA) : Certification of (hybrid) multi-core architectures

Abstract: Multi-core processors have been available for many years on the market and they have been consequently embedded in safety-critical systems (e.g. automotive domain) for more than a decade. They have yet to break through in the avionic domain, one subject to certification. To allow the use of new technologies in a system, the applicant to certification must ensure safety properties and in particular its compliance with certification standards. The A(M)C AMC20-152A and AMC20-193 (formally CAST 32A) define objectives for the respective certification of hardware platforms and of multi-core processors. The PHYLOG project (2016 - 2020) proposed a methodology to facilitate the certification of multi-core processors in the avionic domain. Among the project outcomes, we will present the formal language PML that helps identify interferences within processors, and a stressing benchmarks methodology to help quantify the impact of said interferences.

Multi-core processors certification is now a reality and many applicants are working towards their certification. The emergence of Deep Neural Network (DNN) and machine learning-based applications paved the way for a new generation of hybrid hardware platforms. Hybrid platforms embed several cores and hardware accelerators in a small package. PHYLOG 2, as a follow up of PHYLOG, aims to prepare for the certification of these new platforms. We will present the advancement of the PHYLOG methodology extension for them.

 

 
18:30 - 20:30 Welcome Cocktail (INSA Toulouse - Jardin)  

Mardi 11 juin 2024

Heures événement (+)
08:30 - 09:00 Accueil des Participants - Accueil de participants  
09:00 - 10:15

Circuits et Systèmes AMS & RF (INSA Toulouse - Amphi Riquet)

 Joris Pascal (FHNW, Switzerland) :  Magnetometer network for shape detection: a new instrument for prosthetists and orthotists

Abstract: To design personalized prostheses and orthoses certified prosthetists and orthotists (CPO) have been using for hundred years plaster casting to mold the patient’s limb. In contrast to optical scanners which require a line of sight, plaster casting makes it possible to apply manual corrections to limbs with deformation and to obtain a 3D model of the corrected limb shape. However, plaster casting is a wet, cumbersome, inaccurate, and analog technique. The presented smart sock embeds a network of hundreds of magnetometer chips. Through the magnetic tracking of these magnetometers, a point cloud is obtained and subsequently processed by a morphing algorithm. The system delivers in five seconds the digital 3D model of the patient’s foot, which can be seamlessly used to design a patient specific foot orthosis in a fully digital manner.

 Dominique Morche (CEA-Leti, France) Analog to Feature Extraction Circuit for Low Power RF Signal Recognition

 
10:15 - 11:15 Session Poster 2 et Pause café (INSA Toulouse - Hall Amphi Riquet)  
11:15 - 12:30    
12:30 - 14:00 Déjeuner (INSA Toulouse - Jardin)  
14:00 - 15:30

Club des partenaires (INSA Toulouse - Amphi Riquet)

Remise des prix Concours RISC V (INSA Toulouse - Amphi Riquet)

 
15:30 - 16:30 Session Poster Laboratoires et Pause café (INSA Toulouse - Hall Amphi Riquet)  
16:00 - 18:00 TP Installation Plateforme RISC V (INSA Toulouse - Amphi GEI 13)  
     
16:30- 18:00 Assemblée Générale GdR SoC (INSA Toulouse - Amphi Riquet)  
19:30 - 23:00 Dîner (Hotel Dieu - Toulouse)  

Mercredi 12 juin 2024

Heures événement (+)
08:30 - 09:00 Accueil des Participants - Accueil des Participants  
09:00 - 10:15 Systèmes Connectés pour les Transitions (INSA Toulouse - Amphi Riquet)  
10:15 - 11:15 Session Poster 2 et Pause café (INSA Toulouse - Hall Amphi Riquet)  
11:15 - 12:30

Technologies du futur (INSA Toulouse - Amphi Riquet)

Liza Herrera Diez (C2N -Université Paris Saclay) : Technologie férromagnetiques et leurs implications sur des architectures de calcul

Guilhem Larrieu (LAAS-CNRS) : 3D Nano-Device Architecture for Frugal AI

Abstract : Artificial Intelligence is extensively used for various learning and classification tasks, like facial recognition and biological signals classification, resulting in a significant increase in computing power demands and associated energy costs. This necessitates the exploration of energy-efficient alternatives. Neuromorphic systems, inspired by the nervous system, enable robust, autonomous, and power-efficient information processing through highly parallel architecture, contrasting with the limitations of conventional von Neumann architecture in fully leveraging parallelism and addressing inefficiencies in processing speed and energy consumption due to their sequential data processing and shared memory architecture. In this context, we will discuss new integration opportunities at the hardware level aimed at bridging the gap between memory and logic, particularly in the context of ultra-scaled 3D transistor architectures. To further harness the potential of biological intelligence, with its remarkable energy efficiency, the direct utilization of biological neurons, facilitated by bidirectional hybrid systems and biologically realistic AI algorithms, offers promising avenues. Lastly, we will explore novel pathways for possibly performing edge computing tasks utilizing biological neurons for low-power computing solutions.
 
12:30 - 13:30 Déjeuner (INSA Toulouse - Jardin)  
14:00 - 15:30

Systèmes robustes fiables et sécurisés (INSA Toulouse - Amphi Riquet)

Leopold Van Brandt  (UC Louvain)  : Prédiction des transitions d’état aléatoires dans les circuits électroniques bistables

Abstract: Les systèmes autonomes bistables sont omniprésents dans de nombreux domaines scientifiques. Lorsque l'intensité du bruit intrinsèque est importante, ces systèmes présentent des transitions stochastiques d'un état métastable à un autre. Dans les mémoires électroniques bistables, telles que les cellules SRAM utilisées pour le stockage temporaire de données, ces transitions sont appelées bit flips, des erreurs se produisant en cours de rétention. Celles-ci peuvent être simulées numériquement dans le domaine temporel façon Monte-Carlo, toutefois à un coût calcul élevé. Ce constat motive une approche semi-analytique, reposant sur un modèle stochastique du circuit non-linéaire caractérisable à moindre coût par des simulations SPICE déterministes. Nous montrons que les formules analytiques requérant une approximation petit signal autour du point fixe stable de la dynamique de la cellule SRAM sont imprécises. Puisant dans le domaine de la chimie, nous proposons plutôt une formule d'Eyring-Kramers, laquelle peut être étendue afin de tenir compte d’une variance de bruit évoluant avec l’état du circuit. Les premiers essais numériques sur des cellules SRAM affectées par de sévères variations de fabrication suggèrent que l’ordre de grandeur du temps moyen avant défaillance est correctement prédit. Cela laisse espérer, à terme, l’émergence d’une méthodologie rigoureuse et systématique, à la fois précise et peu coûteuse, d’évaluation de la fiabilité des SRAM.

Luigi Dilillo (Université de Montpellier - IES) :

 
15:30 - 16:00 Clôture du Colloque - Clôture du Colloque
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